Hello, I'm
Work
I make sure chips at IBM meet timing before they ship, and build the tools that get them there.
-
2025 – now
Chip Timing Analysis Engineer at IBM
Timing analysis for server and ASIC designs, and the engines underneath it: automation and custom analysis for multi-corner, multi-mode closure, plus variation modeling, aging effects and runtime bottlenecks.
-
2024 – 2025
Chip Timing Analysis Intern at IBM
Implemented aging-effect and other timing methodologies on 5 nm designs. Optimized C++ that made ASIC timing workflows about 5% faster, and rebuilt an internal site for the EDA and chip design teams, lifting engagement about 50%.
-
2023
Hardware Development Intern at IBM
An eight-week program in hardware development and distribution.
Things I’ve built
-
EmuGator
2024 – 2025A RISC-V pipeline emulator that runs in the browser. Two- and five-stage pipelines with live datapath and control signals, a GNU-compatible assembler, UART, cycle stepping and breakpoints — so students can watch a processor think.
Rust, WebAssembly
-
Activio
2023An image-sharing site for posting about places you’ve been, made with a team of four. I built the backend: a Go REST API for posts, comments, image resizing and auth, containerized with Docker.
Go, Gin, Gorm, MySQL, Angular
-
NeuralC
2022A neural network framework written from scratch in C++ with zero dependencies. It learned to read handwriting: over 90% on MNIST, over 80% on E-MNIST.
C++
School
B.S. in Computer Engineering, minor in Mathematics
CourseworkComputer architecture, digital design, embedded systems, data structures and algorithms, discrete math.
What I write inC++, Python, Tcl, Rust and Go.
Say hi
© 2026 Rohan Simon